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Application of electron beam lithography for downscaling of SOI-bipolar and BiCMOS
Authors:M. Sauter, E. Bertagnolli, E. Knapek, A. Stemmer, B. Fr  schle, I. Eisele,H. Klose
Affiliation:

a Siemens AG, Corp. Research and Development, Otto-Hahn-Ring 6,81739, Munich, Germany

b Fraunhofer Institute for Solid-State-Technology, Hansastr. 27d, 80686, Munich, Germany

c Hochschule der Bundeswehr, Werner-Heisenberg-Weg 39, 85579, Neubiberg, Germany

Abstract:A direct-write sub-100-nm electron beam lithography has been used for scaling of a novel lateral bipolar structure. The keyprocess is a lithographic base definition by using small PMMA structures as implantation masks. Downscaling of base widths into the sub-100-nm-regime could be successfully demonstrated. Process simulation is used to estimate the effects of process parameters on device scaling. The physical and technological effects which are responsible for base formation are intensively discussed. A relation for base formation is derived and confirmed by electrical measurements.
Keywords:
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