| "一般时序电路设计"的课堂教学及实践改革 |
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| 引用本文： | 方怡冰."一般时序电路设计"的课堂教学及实践改革[J].电气电子教学学报,2005,27(5):102-105. |
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| 作者姓名： | 方怡冰 |
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| 作者单位： | 集美大学信息工程学院,福建厦门361021 |
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| 摘 要： | 分析了“数字电路与逻辑设计”课程中“一般时序电路设计”的内容的地位与作用,指出传统教学方法在设计较复杂电路时的局限性,为此完善了教材对该部分内容的讲解,同时设计了一种基于Active—HDL6．1和QUARTUSII4．1软件及可编程逻辑器件FPGA讲授“一般时序电路设计”的教学方法,实践证明该教学方法使用不多的课时就能让学生轻松的掌握复杂数字系统电路的设计。
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| 关 键 词： | 一般时序电路设计 教学方法 Active-HDL6.1 QUARTUSII4.1 FPGA |
| 文章编号： | 1008-0686（2005）05-0102-04 |
| 收稿时间： | 2005-07-01 |
| 修稿时间： | 2005-08-19 |
The Reformation on Classroom Teaching and Practice of General Sequential Circuit Design |
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| FANG Yi-bin ,.The Reformation on Classroom Teaching and Practice of General Sequential Circuit Design[J].Journal of Electrical & Electronic Engineering Education,2005,27(5):102-105. |
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| Authors: | FANG Yi-bin |
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| Affiliation: | Information Engineering College, Jimei University, Fujian 361021, China |
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| Abstract: | The position and function of teaching contents about "general sequence circuit design" are analyzed in the course of Digital Circuits and Logic Design,the explanation for teaching contents is perfected,and the limitation of traditional teaching method for designing complex electric circuits is pointed out.A teaching method for "Design of General Sequence Circuit" based on Active-HDL6.1 and QUARTUSII4.1 software and programmable logic piece FPGA is introduced.The practice proved that the teaching method can let student master designing of the complex digital system circuits in a short time. |
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| Keywords: | Active-HDL6 1 QUARTUSII4 1 FPGA |
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