| 16路语音压缩编解码并行处理的实现 |
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| 引用本文： | 张莉莉,潘绍华.16路语音压缩编解码并行处理的实现[J].计算机工程,2002,28(8):209-210. |
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| 作者姓名： | 张莉莉 潘绍华 |
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| 作者单位： | 电信科学技术研究院第一研究所,上海200002 |
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| 摘 要： | 根据标准在单芯片上实现了路语音压缩编解码并行处理,从而完成了数字录音中继卡的关键软件部ITU-T G.723.1TMS320C620116分。结合算法特点进行了算法优化,语言级和汇编级的分别优化,以减少计算复杂度和所需存储空间。并给出了达到的性能指标。G.723.1C最后通过了全套检测矢量。
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| 关 键 词： | 语音编解码 G.723.1算法 TMS320C6201定DSP点芯片 并行处理 |
| 文章编号： | 1000-3428(2002)08-0209-02 |
| 修稿时间： | 2001年9月17日 |
Realization of Parallel Speech Coder/Decoder Compressing on 16 Ways |
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| ZHANG,LiliPAN Shaohua.Realization of Parallel Speech Coder/Decoder Compressing on 16 Ways[J].Computer Engineering,2002,28(8):209-210. |
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| Authors: | ZHANG LiliPAN Shaohua |
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| Abstract: | According to ITU-T Recommendation G.723.1we realize parallel speech coder/decoder compressing on 16 ways on single TMS320C6201 and finish crucial software of digital recording transfer chip designment.According to the features of the G.723.1 algorithm and the architecture of C6201,the algorithm,C programming and .asm programming are optimized so as to reduce computation complex and memory size. The chart of coder/decoder performance was presented. Finally we make all test vectors. ;;; |
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| Keywords: | Speech coder/decoderG 723 1 algorithmTMS320C6201 fixed-point DSPsParallel process |
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