A method for consistent fault coverage reporting

Procedure 5012 of Mil-Std-883, which describes requirements for the logic model, the assumed fault model and universe, fault classing, fault simulation and reporting of test results for digital microcircuits is described. The procedure provides a consistent means of measuring fault coverage regardless of the specific logic and fault simulator used. Procedure 5012 addresses complex, embedded structures such as random-access memories (RAMs), read-only memories (ROMs), and programmable logic arrays (PLAs) weighting gate-level and non-gate-level structures by transistor counts to arrive at overall fault coverage