| 一种基于RapidIO接口的嵌入式系统 |
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| 引用本文： | 章乐,李雅静,倪明,柴小丽. 一种基于RapidIO接口的嵌入式系统[J]. 计算机工程, 2008, 34(Z1) |
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| 作者姓名： | 章乐 李雅静 倪明 柴小丽 |
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| 作者单位： | 华东计算技术研究所,上海,200233 |
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| 摘 要： | 针对嵌入式系统的高速通信需求,提出一种基于RapidIO接口的嵌入式系统,该方案以Xilinx的FPGA以及PowerPC嵌入式CPU为平台,建立RapidIO IP核与嵌入式系统的硬件和软件接口,对其功能进行验证.给出硬件结构图及关键部分的设计思路.采用逻辑仿真与物理仿真证明了方案的有效性.
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| 关 键 词： | 片上系统 硬件集成 |
Embedded System Based on RapidIO Interface |
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| ZHANG Le,LI Ya-jing,NI Ming,CHAI Xiao-li. Embedded System Based on RapidIO Interface[J]. Computer Engineering, 2008, 34(Z1) |
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| Authors: | ZHANG Le LI Ya-jing NI Ming CHAI Xiao-li |
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| Affiliation: | ZHANG Le,LI Ya-jing,NI Ming,CHAI Xiao-li (East China Institute of Computer Technology,Shanghai 200233) |
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| Abstract: | With respect to the requirement of high-speed communication of embedded system,this paper proposes an engineering method to integrate the RapidIO IP Core to embedded system.This method builds the hardware/software interface between the RapidIO Core and PLB bus based on the platform of Xilinx FPGA and embedded CPU-PowerPC.Hardware architecture and design thoughts are also introduced.The method is proved valid by logic simulation and FPGA emulation. |
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| Keywords: | RapidIO |
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