A Mixed-Mode Analog Neural Network Using Current-Steering Synapses

A hardware neural network is presented that combines digital signalling with analog computing. This allows a high amount of parallelism in the synapse operation while maintaining signal integrity and high transmission speed throughout the system. The presented mixed-mode implementation achieves a synapse density of 4 k per mm² in 0.35 μm CMOS. The current-mode operation of the analog core combined with differential neuron inputs reaches an analog precision sufficient for 10 bit parity while running at a speed of 0.8 Teraconnections per second.