基于FPGA的高分辨率D／A转换器的实现

为增强FPGA（现场可编程门阵列）对模拟信号的处理能力，扩展FPGA的应用范围，介绍了一种基于FPGA实现高分辨率D／A转换器的技术。利用FPGA内部PLL（锁相环），提高时钟信号的计数频率，从而提高PWM（脉宽调制）信号的基波频率，通过5阶巴特沃斯低通滤波器，实现14位高分辨率D／A转换器。阐述了PWM实现D／A转换器的理论基础和实际应用注意事项，该方法已用于实际D／A转换器系统，具有精度高、误差小的优点，对于FPGA的实际应用具有一定的指导意义。

Implementation of a High Resolution D/A Convertor Based on FPGA

In this paper, a D/A convertor technology with 14-bits high resolution is introduced to extend FPGA ability of processing analog signal and application range. Increasing the frequency of the clock signal with the PLL of FPGA raises the base frequency of PWM signal which, through 5th-order Butterworth low-pass filter, implements 14-bits high resolution D/A convertor. This paper describes in detail the theory of implementation of D/A convertor with PWM signal and the attention points for practice. The technology has been used in a practical system featuring high accuracy, low error. This is valuable to guide the application of FPGA.