Theory of PLL fractional-N frequency synthesizers

This paper presents an overview of the evolution of frequency synthesizers based on phase-locked loops (PLLs). The main limitations of the digital PLLs are described, and the consequent necessity of using fractional-N techniques is justified. The origin of the typical spurious noise lines on the sidelobes of the synthesized frequency is explained. It is shown how to eliminate these spurious noise lines by using digital modulators to control the frequency division value. Finally, the implications of using digital modulators together with fractional-N PLLs on the output phase noise are analysed.