| 边界扫描结构下的BIST内核及FPGA实现 |
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| 引用本文： | 谈恩民,郭学仁.边界扫描结构下的BIST内核及FPGA实现[J].桂林电子科技大学学报,2000,20(1):86-90. |
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| 作者姓名： | 谈恩民 郭学仁 |
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| 作者单位： | 桂林电子工业学院,计算机分院 |
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| 基金项目： | 国家科技预研项目，30.2.5.1， |
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| 摘 要： | 从国内厂家一个实际的内核电路出发,对其进行BIST插入及边界扫描测试的研究;在VHDL描述的基础上,用FPGA实现设计思想,并通过了边界扫描主控机的实际测试运行,其过程验证了将边界扫描和BIST技术应用于MCM或PCB板功能测试的可行性.
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| 关 键 词： | BIST 边界扫描 FPGA 内核 VHDL |
| 修稿时间： | 2000-01-05 |
BIST of a CUT Using Boundary-scan Architecture in FPGA |
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| Tan Enmin,Guo Xueren.BIST of a CUT Using Boundary-scan Architecture in FPGA[J].Journal of Guilin Institute of Electronic Technology,2000,20(1):86-90. |
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| Authors: | Tan Enmin Guo Xueren |
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| Abstract: | By
using Boundary Scan,this paper researches on BIST of a CUT,which is a core circuit of a
domestic product.The design is described by VHDL and implemented with FPGA.The design
could pass the test of the TAP controller.The paper finally concludes that applying BIST
and Boundary-Scan on the function test of MCM or PCB is possible |
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