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TIES: A testability increase expert system for VLSI design |
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| Authors: | G. Buonanno F. Fummi D. Sciuto |
| Affiliation: | (1) Dipartimento di Elettronica e Informazione, Politecnico di Milano, Italy |
| Abstract: | |
| Keywords: | design for testability techniques testable design DfT advisor testability analysis |
| 本文献已被 SpringerLink 等数据库收录！ | |