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| SoC门级功耗分析方法 | |
| 引用本文： | 徐永钊,田祖伟,阳若宁,姚丽娜,李洪涛,曾志峰. SoC门级功耗分析方法[J]. 通信技术, 2011, 44(2): 146-148 |
| 作者姓名： | 徐永钊 田祖伟 阳若宁 姚丽娜 李洪涛 曾志峰 |
| 作者单位： | 1. 东莞理工学院,广东,东莞,523808 2. 湖南第一师范学院,湖南,长沙,410000 3. 湖南广播电视大学,湖南,长沙,410004 |
| 基金项目： | 国家自然科学基金资助项目(批准号:U0935002)东莞科技计划项目，湖南省科技计划资助项目 |
| 摘 要： | 随着IC设计规模的增大和运行频率的提高,设计中低功耗的需求也随之提高,在芯片投片之前,能够比较准确的评估出芯片的功耗是当前设计中非常关键的技术点之一。比较四种不同层次的功耗分析方法,门级功耗分析兼有精度高,分析速度快的优点。根据SPI接口电路实践,描述了门级功耗工具的使用方法,并通过门级和晶体管级分析的对比测试证明该方法能较为准确的估算出新品的功耗,为SoC项目的正常研发提供帮助。 |
| 关 键 词： | SoC 功耗分析 门级 晶体管级 |
A Method for Gate-level Power Analysis of SoC |
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| XU Yong-zhao,TIAN Zu-wei,YAN Ruo-ning,YAO Li-na,LI Hong-tao,ZENG Zhi-feng. A Method for Gate-level Power Analysis of SoC[J]. Communications Technology, 2011, 44(2): 146-148 | |
| Authors: | XU Yong-zhao TIAN Zu-wei YAN Ruo-ning YAO Li-na LI Hong-tao ZENG Zhi-feng |
| Affiliation: | ①(①Dongguan University of Technolog,Dongguan Guangdong 503803,China; ②Hunan First Normal University,Changsha Hunan 410000,China; ③Hunan Radio ＆ Television University,Changsha Hunan 410004,China) |
| Abstract: | With the growth of scale and speed of integrated circuits,the requirement of low-power design becomes much more important.It is very important to analyze the power accurately before chips are taped-out.As compared with other three methods of power analysis,gate-level power analysis could achieve the balance of high accuracy and fast evaluation.This article describes the method for using EDA tools in gate-level power analysis in SPI module.The comparison of gate-level and transistor level shows that the gate... |
| Keywords: | SoC |
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