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基于FPGA的高性能DAC芯片测试与研究
引用本文:马腾,袁著. 基于FPGA的高性能DAC芯片测试与研究[J]. 通信技术, 2011, 44(2): 154-156
作者姓名:马腾  袁著
作者单位:电子科技大学,电子科学技术研究院,四川,成都,610054
摘    要:介绍了一种基于现场可编程门阵列(FPGA,field programmable gate array)的高性能数模转换器(DAC,digital to analog converter)性能参数的回路测试方法。以FPGA、DAC和模数转换器(ADC,analog to digital converter)等元器件为硬件测试平台,将待测数字信号转换成模拟信号再转换成数字信号,经过Matlab计算和分析后得到DAC芯片的静态特性参数和动态特性参数。其中失调误差为0.036%,增益误差为3.63%,信号噪声比为58 dB,信号噪声及失真比为57.75 dB,无杂散动态范围为62.84 dB,有效位数为9.3。测试结果表明:测试方法通用性好,精确度高,成本低。

关 键 词:高性能DAC芯片  DAC芯片参数  回路测试法  现场可编程门阵列

Test and Research of High Performance DAC Chip based on FPGA
MA Teng,YUAN Zhu. Test and Research of High Performance DAC Chip based on FPGA[J]. Communications Technology, 2011, 44(2): 154-156
Authors:MA Teng  YUAN Zhu
Affiliation:MA Teng,YUAN Zhu (Inst.of Electronic Science and Technology,UESTC,Chengdu Sichuan 610054,China)
Abstract:A FPGA-based loop test of high performance DAC is presented.With FPGA,DAC,ADC and other components as hardware test platform,the tested digital signal is first converted into analog signal and then into digital signal.The static and dynamic performance parameters of DAC chip are finally calculated and analyzed by using Matlab software.The offset error is 0.036%,the gain error 3.63%,SNR 58dB,SINAD 57.75dB,SFDR 62.84dB,and ENOB 9.3.The test results show that the test method is of good versatility,high accurac...
Keywords:high performance DAC chip  DAC chip parameters  loop test  FPGA  
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