Downscaling and Charge Transport in Nanostructured Ferroelectric Memory Diodes Fabricated by Solution Micromolding

Ferroelectric polymer memory diodes are interface devices where charge injection into the organic semiconductor is controlled by the stray electric field of the ferroelectric polymer. Key to high current density and current modulation is the areal density of well‐defined interfaces. Here, bistable diodes are fabricated by using the soft lithography method solution micromolding. First, the semiconducting polymer poly(9,9‐dioctylfluorene) is patterned into linear gratings. Subsequently, bilinear arrays are obtained by backfilling with the ferroelectric polymer poly(vinylidenefluoride‐co‐trifluoroethylene). The lateral feature size is scaled down from 2 μm to 500 nm. Comprising memory diodes show rectifying J–V characteristics with an On‐current density larger than 10³ A m^?2 and an On/Off current ratio exceeding 10³. The charge transport is explained by 2D numerical simulations. Since the dependence of polarization on electric field is explicitly taken into account, entire J–V characteristics can be quantitatively described. The simulations reveal that rectifying J–V characteristics are inherently related to the concave shape of the patterned ferroelectric polymer. It is argued that the exponential increase in current density with decreasing feature size can be due to confinement of the semiconductor. High On‐current density combined with downscaling, rectification, and simple fabrication yield new opportunities for low‐cost integration of high‐density solution‐processed memories.