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A 2.5-V BiCMOS comparator with current-mode interpolation
Authors:Boni   A. Morandi   C. Padoan   S.
Affiliation:Dipt. di Ingegeneria dell'Inf., Parma Univ.;
Abstract:A high-speed latched comparator based on a current-mode architecture is presented. It achieves a sampling speed of 150 MS/s at 2.5 V supply, with a power consumption lower than conventional schemes. Its very low kickback noise makes it especially suitable for differential analog-to-digital converters (ADCs). Moreover, it supports precise 2X interpolation in current mode at full clock speed, allowing a further reduction of the ADC power consumption. The comparator was implemented in a 0.8 μm BiCMOS technology
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