Epitaxial strontium oxide layers on silicon for gate-first and gate-last TiN/HfO2 gate stack scaling |
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Authors: | Martin M Frank Chiara MarchioriJohn Bruley Jean FompeyrineVijay Narayanan |
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Affiliation: | a IBM T.J. Watson Research Center, 1101 Kitchawan Road, Yorktown Heights, NY 10598, USA b IBM Research - Zurich, Säumerstrasse 4, CH-8803 Rüschlikon, Switzerland |
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Abstract: | We show that a thin epitaxial strontium oxide (SrO) interfacial layer enables scaling of titanium nitride/hafnium oxide high-permittivity (high-k) gate stacks for field-effect transistors on silicon. In a low-temperature gate-last process, SrO passivates Si against SiO2 formation and silicidation and equivalent oxide thickness (EOT) of 5 Å is achieved, with competitive leakage current and interface trap density. In a gate-first process, Sr triggers HfO2-SiO2 intermixing, forming interfacial high-k silicate containing both Sr and Hf. Combined with oxygen control techniques, we demonstrate an EOT of 6 Å with further scaling potential. In both cases, Sr incorporation results in an effective workfunction that is suitable for n-channel transistors. |
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Keywords: | MOSFET Gate dielectrics Metal gate electrodes Replacement gate Molecular beam epitaxy Surface passivation |
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