Ultrasonic bonding for multi-chip packaging bonded with non-conductive film

System-on-Chip and System-on-Package technologies have advantages depending on application needs. As a number of electrical and electronic equipment manufacturers have an interest in increasing CMOS technology densities, a range of two- and three-dimensional silicon integration technologies are emerging which will support next-generation high-end semiconductors such as high speed microprocessors and high speed memories. However, there are many issues regarding process integration, thermal management, and reliability of 3D stacked package.In this study, the printed circuit board (PCB), silicon carrier and silicon chip are integrated with ultrasonic vibration. Die shear tests of the joints were carried out with increasing bonding time and input power to optimize the bonding condition. The integrated chips were successfully bonded to the PCB with and without NCF using a transverse ultrasonic bonding. Electrical resistance of multi-chip bonded with NCF (10 mΩ) measures lower than that bonded without NCF (28.9 mΩ). The voids and delamination were easily found on the joint bonded without NCF that caused lower shear strength.