首页 | 本学科首页   官方微博 | 高级检索  
     

基于遗传算法的数字集成电路多故障测试生成方法
引用本文:马长李,马瑞萍,廖剑. 基于遗传算法的数字集成电路多故障测试生成方法[J]. 仪表技术, 2013, 0(12): 25-28
作者姓名:马长李  马瑞萍  廖剑
作者单位:[1]海军装备研究院,北京100161 [2]海军航空工程学院控制工程系,山东烟台264001
摘    要:在数字集成电路多故障测试生成算法的研究中,寻求具有高故障覆盖率,较短测试生成时间是问题的关键。文中采用遗传算法,通过对已有算法的分析,提出了计算简单、切实有效的适应度函数,减小了算法的时间复杂度,实验结果证明该算法可以有效地得到故障的测试矢量。

关 键 词:数字集成电路  测试生成算法  Hopfield神经网络  遗传算法

Multi-fault Test Generation Method of Digital Integrated Circuit Based on Genetic Algorithm
MA Chang-li,MA Rui-ping,LIAO Jian. Multi-fault Test Generation Method of Digital Integrated Circuit Based on Genetic Algorithm[J]. Instrumentation Technology, 2013, 0(12): 25-28
Authors:MA Chang-li  MA Rui-ping  LIAO Jian
Affiliation:1. Naval Academy of Armament, Beijing 100161, China; 2. Department of Control Engineering,Naval Aeronautical and Astronautical University, Yantai 264001, China)
Abstract:Based on the research on Hopfield neural networks model, the multi-fault test generation algorithm of combinational circuits has been studied for the purpose of improving faults coverage and reducing the test generation time. Genetic algorithm was used. An easy and effective fitness function was proposed in this paper through analyzing ex- isting algorithms. It cuts down the algorithmic time complexity. The result shows that the proposed algorithm can gain the multi-fauh test vectors more effectively than others
Keywords:digital integrated circuit  test generation algorithm  Hopfield neural network  genetic algorithm
本文献已被 维普 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号