| 雷达方位形成器的FPGA实现 |
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| 引用本文： | 陈晚华,李涌波.雷达方位形成器的FPGA实现[J].电子产品可靠性与环境试验,2007,25(3):57-59. |
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| 作者姓名： | 陈晚华 李涌波 |
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| 作者单位： | 中国人民解放军第91630部队,广东,广州,510318 |
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| 摘 要： | 为雷达形成方位数据而设计计算机接口,采用FPGA和SDC/RDC器件组成的数据平台,利用FPGA来实时地计算所合成的舷角数据和航向数据,并输出方位数据.经过软件编程仿真,证明此方法完全满足雷达对方位数据的实时性和精度的要求.
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| 关 键 词： | 雷达 方位 合成器 现场可编程门阵列 |
| 文章编号： | 1672-5468（2007）03-0057-03 |
| 修稿时间： | 2007-05-07 |
Realization of FPGA for Radar Azimuth Former |
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| CHEN Wan-hua,LI Yong-bo.Realization of FPGA for Radar Azimuth Former[J].Electronic Product Reliability and Environmental Testing,2007,25(3):57-59. |
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| Authors: | CHEN Wan-hua LI Yong-bo |
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| Affiliation: | Unity 91630, Guangzhou 510318, China |
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| Abstract: | An interface was designed for inputting radar azimuth data. A new structure of data processing hardware platform with the combination of FPGA and SDC/RDC was adopted in the system. The relative bearing data and course data are computed and synthesized by FPGA in real time. The azimuth data is exported. Based on the software simulation analysis, it is shown that the proposed method can meet the requirements of the high resolution searching radar for precise and real-time azimuth data. |
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| Keywords: | radar azimuth synthesizer FPGA |
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