Multi/demultiplexing in Gbit/s range using dual gate GaAs m.e.s.f.e.t.s |
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| Authors: | Beneking H. Filensky W. Ponse F. |
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| Affiliation: | Aachen Technical University, Institute of Semiconductor Electronics, Aachen, West Germany; |
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| Abstract: | Multiplexing from 1 to 2 Gbit/s and corresponding demultiplexing from 2 to 1 Gbit/s including clock regeneration and pulse width reduction has been performed using dual gate GaAs m.e.s.f.e.t.s. Circuits and time behaviour of input, clock and output signals are shown. |
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