Signal-integrity improvement method and its robustness evaluation for VLSI and VLSI-packaging |
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Authors: | Masami Ishiguro Hiroshi Nakayama Yuki Shimauchi Noriyuki Aibe Ikuo Yoshihara Moritoshi Yasunaga |
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Affiliation: | (1) Department of Electronics Engineering, Korea University, 1, 5-ka, Anam-dong, Seongbuk-gu, Seoul, 136-713, Republic of Korea;(2) Department of Electrical Engineering, Anyang University, Manan-gu, Anyang, Kyonggi-do, 430-714, Republic of Korea |
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Abstract: | Nowadays, a GHz frequency signal needs to be propagated on a printed circuit board (PCB) with low distortions. In addition, a higher-frequency signal of 10 GHz or more will also need to be propagated with low distortion in very-large-scale integration (VLSI) in the future. However, signal propagation with low distortion is getting more and more difficult as the frequency increases. In order to solve this problem and to ensure signal integrity, we have proposed a novel transmission line called a “segmental transmission line” (STL). In the STL, a transmission line is divided into multiple segments of individual characteristic impedance. The multiple segments are designed to fix the waveform distortion on the transmission line by solving a combinatorial explosion problem using a genetic algorithm. In a previous article, we have shown the effectiveness of an STL designed for a GHz clock signal in computer simulations. We have also fabricated two scaled-up STL prototypes for a clock signal using real printed circuit boards (PCBs). In this article, we input a random signal by changing its frequency to the scaled-up STL prototype designed for a 150-MHz clock signal. We show that the STL has high robustness to the random signals and the frequency fluctuations, which indicates the generality of the STL technique. |
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