Effects of traps on thin film transistors

Trap effects on Weimer-type thin film transistors (TFT) were studied. Measurements of thermally stimulated current (TSC), temperature dependence of drain current and MOS structure capacitance were performed to study trap distribution in TFT's. It was found that the steady state Fermi level lies near to the conduction band (0·1–0·05 eV) in the TFT. Only those traps lying near or above the Fermi level can affect the performance of TFT. Drain current relaxation effects for a step-gate voltage, and drain current hysteresis for a sine-wave gate voltage, were studied as trap effects on TFT performance. These phenomena were interpreted in terms of trap kinetics, and the roles of traps in the insulator film and in the semiconductor film were identified. The energy depth, density and cross section of traps affecting TFT performance were estimated.