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A dual VCDL DLL based gate driver for zero-voltage-switching DC-DC converter
Tian Xin, Liu Xiangxin, Li Wenhong. A dual VCDL DLL based gate driver for zero-voltage-switching DC-DC converter[J]. Journal of Semiconductors, 2010, 31(7): 075012. doi: 10.1088/1674-4926/31/7/075012 Tian X, Liu X X, Li W H. A dual VCDL DLL based gate driver for zero-voltage-switching DC-DC converter[J]. J. Semicond., 2010, 31(7): 075012. doi: 10.1088/1674-4926/31/7/075012.Export: BibTex EndNote
Authors:Tian Xin  Liu Xiangxin  Li Wenhong
Affiliation:State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China
Abstract:This paper presents a dual voltage-controlled-delay-line (VCDL) delay-lock-loop (DLL) based gate driver for a zero-voltage-switching (ZVS) DC-DC converter. Using the delay difference of two VCDLs for the dead time control, the dual VCDL DLL is able to implement ZVS control with high accuracy while keeping good linearity per-formance of the DLL and low power consumption. The design is implemented in the CSM 2P4M 0.35μm CMOS process. The measurement results indicate that an efficiency improvement of 2%-4% is achieved over the load current range from 100 to 600 rnA at 4 MHz switching frequency with 3.3 V input and 1.3 V output voltage.
Keywords:voltage-control-delay-line  delay-lock-loop  delay-unit  zero-voltage-switching  pseudo-current-control-inverter
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