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一种应用于SoC的总线系统模拟验证方法
引用本文:岳华伟,徐勇军,张志敏,易波.一种应用于SoC的总线系统模拟验证方法[J].计算机辅助设计与图形学学报,2005,17(10):2220-2226.
作者姓名:岳华伟  徐勇军  张志敏  易波
作者单位:中国科学技术大学物理系,合肥,230026;中国科学院计算技术研究所计算机体系结构研究室,北京,100080;中国科学院计算技术研究所信息网络室,北京,100080;中国科学院计算技术研究所计算机体系结构研究室,北京,100080;中国科学技术大学物理系,合肥,230026
基金项目:国家自然科学基金(90207002,60242001)
摘    要:提出一种基于模拟仿真和覆盖率分析的方法.通过前期使用带约束的随机测试向量进行模拟仿真、在达到一定覆盖率后进行覆盖率分析、然后手工生成测试向量提高覆盖率的方法,对一款SoC芯片的总线系统进行验证,有效地减少了验证仿真所需时间,得到了预期的验证结果.

关 键 词:片上系统  总线系统验证  覆盖率分析
收稿时间:2004-06-11
修稿时间:2004-06-112004-12-03

A Simulation-Based Verification Method for SoC Bus System
Yue Huawei,Xu Yongjun,Zhang Zhimin,Yi Bo.A Simulation-Based Verification Method for SoC Bus System[J].Journal of Computer-Aided Design & Computer Graphics,2005,17(10):2220-2226.
Authors:Yue Huawei  Xu Yongjun  Zhang Zhimin  Yi Bo
Affiliation:1 Department of Physics, University of Science and Technology of China , Hefei 230026; 2 Computer Architecture Laboratory, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100080; 3 Information Network Laboratory, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100080
Abstract:We propose a simulation-based method in the verification of SoC bus constrained-random vector is used to make simulation first; then a coverage system. By the method, analysis is made in the simulation process until a certain coverage statistics is obtained. Finally, the test vector is manually generated. We use this method to verify a SoC system and get a satisfactory result by reducing the time of simulation effectively.
Keywords:system on a chip  bus system verification  coverage-analysis
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