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基于FPGA的雷达中/视频数据采集与回放系统设计
引用本文:宋杰,赵巨波,丁昊.基于FPGA的雷达中/视频数据采集与回放系统设计[J].现代电子技术,2010,33(22):168-171.
作者姓名:宋杰  赵巨波  丁昊
作者单位:[1]海军航空工程学院信息融合技术研究所,山东烟台264001 [2]辽宁葫芦岛试验基地,辽宁葫芦岛125105
摘    要:设计了一种基于FPGA的雷达中/视频数据采集与回放系统。系统以FPGA为数据采集和传输控制的芯片,通过USB 2.0接口实现与计算机的通信,并运用虚拟技术,采用Visual C++语言设计系统的计算机实时显示界面。设计中运用硬件描述语言对FPGA进行编程,在完成对输入信号的采集和记录的同时,实现了对输入信号的防抖动、过零检测、等精度测频及电压最值、峰峰值和平均值的测量。该系统被封装于一个小型的屏蔽盒内,非常便于携带,可方便应用于外场雷达的数据采集。

关 键 词:FPGA  数据采集与回放  虚拟仪器技术  Visual  C++

Development of Radar Intermediate/Video-Frequency Data Acquisition and Replaying System with FPGA
SONG Jie,ZHAO Ju-bo,DING Hao.Development of Radar Intermediate/Video-Frequency Data Acquisition and Replaying System with FPGA[J].Modern Electronic Technique,2010,33(22):168-171.
Authors:SONG Jie  ZHAO Ju-bo  DING Hao
Affiliation:1, Research Institute of Information Fusion, Naval Aeronautical and Astronautical University. Yantai 264001, China; 2. The Experiment Basement, Huludao 123105, China)
Abstract:A system which is used to acquire and replay radar's intermediate/video-frequency data, is designed in this pa- per. The system uses FPGA as kernel chip to control the data acquisition and transmission, and uses USB2.0 to communicate with a microcomputer. With the help of virtual technology, it adopts Visual C-- language to design a real-time display inter- face on microcomputer monitor. In the process of design, the FPGA devices were programmed with VHDL language. Along with the input signal's acquisition and recording, the system also realized the {unction of anti-dithering, zero-detection, frequency measurement, and the peak value, maximum to maximum and average voltage measurement. The system which is put into a small shielding box, is very portable, and it is very convenient to acquire the data of outside radar.
Keywords:FPGA data acquisition and replaying  virtual instrument  technology  Visual C++
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