Switched-current integrator with reduced transient glitches |
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Authors: | Psychalinos C |
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Affiliation: | Dept. of Phys., Patras Univ.; |
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Abstract: | An improved SI integrator circuit with reduced amplitude of transient glitches is proposed. The main advantage of the proposed topology is that, using an extra current mirror circuit, the same reduction of transient glitches is achieved as in the case in which an op-amp configuration was used |
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