| 基于EAPR的动态部分可重构系统研究及实现 |
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| 引用本文： | 陈峰,高志刚,戴国骏. 基于EAPR的动态部分可重构系统研究及实现[J]. 杭州电子科技大学学报, 2011, 31(1): 37-40 |
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| 作者姓名： | 陈峰 高志刚 戴国骏 |
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| 作者单位： | 杭州电子科技大学计算机应用研究所,浙江,杭州,310018 |
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| 摘 要： | 该文采用最新的基于EAPR的动态部分重构的方法,利用IP核构建片上系统的思想,设计出PowerPC405加FPGA的硬件平台设计可重构系统,FPGA采用CompactFlash配置方式,由硬核处理器PPC405控制内部配置访问接口实现动态部分可重构.该设计实现了硬件资源的时分复用,提高了FPGA的利用率,缩短了重配置时...
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| 关 键 词： | 现场可编程门阵列 早期获取 动态可重构 内部配置接口 |
The Research and Implementation of Dynamic Partial Reconfigurable System Based on EAPR |
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| CHEN Feng,GAO Zhi-gang,DAI Guo-jun. The Research and Implementation of Dynamic Partial Reconfigurable System Based on EAPR[J]. Journal of Hangzhou Dianzi University, 2011, 31(1): 37-40 |
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| Authors: | CHEN Feng GAO Zhi-gang DAI Guo-jun |
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| Affiliation: | CHEN Feng,GAO Zhi-gang,DAI Guo-jun(Institute of Computer Application,Hangzhou Dianzi University,Hangzhou Zhejiang 310018,China) |
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| Abstract: | In this paper,we adopt the latest design methodology of dynamic partial reconfiguration of FPGA based on EAPR which is proposed by Xilinx and use IP core to build system on chip.This paper also provides a way of design a dynamically reconfigurable system based on PPC405 and FPGA hardware platform to configure and reconfigure FPGA selected a CompactFlash configuration mode.The PowerPC405,the hardware core microprocessor in XC2VP30,is used to manage the ICAP to implement the dynamic partial reconfiguration pr... |
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| Keywords: | FPGA EAPR dynamic reconfiguration internal configuration access port |
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