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Chained backplane communication architecture for scalable multiprocessor systems
Affiliation:1. Department of Epidemiology, The Netherlands Cancer Institute, Amsterdam, The Netherlands;2. Clinical Trial Service Unit, Nuffield Department of Population Health, University of Oxford, Oxford, United Kingdom;3. Netherlands Comprehensive Cancer Organization, Utrecht, The Netherlands;4. Department of Hematology, Erasmus MC Cancer Institute, Rotterdam, The Netherlands;5. Department of Radiation Oncology, Erasmus MC Cancer Institute, Rotterdam, The Netherlands;6. Department of Clinical Oncology, Leiden University Medical Center, Leiden, The Netherlands;7. Oxford Cancer Centre, Oxford University Hospitals NHS Foundation Trust, Oxford, United Kingdom;8. Department of Radiation Oncology, The Netherlands Cancer Institute, Amsterdam, The Netherlands;1. Capital Normal University, Beijing, China;2. Cambricon Technologies, China
Abstract:A scalable backplane topology which allows a practically unlimited number of modules with identical interfaces is presented. Short, buffered, point-to-point connections overcome clock skew problems. Synchronized, pipelined data transfer operations ensure high throughput and reasonably low latency times for fine-grain parallel algorithms. A simple bus interface logic without any special hardware configuration guarantees a cheap implementation with standard FPGAs. The measured performance in our FPGA based prototype with 32 bit wide data bus shows a throughput of 160 Mbytes/s for each module with 75 ns latency time between modules.
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