Techniques to increase the schedulable utilization of cache-based preemptive real-time systems |
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| Affiliation: | 1. College of Community, Princess Nourah bint Abdulrahman University, Riyadh, Saudi Arabia;2. College of Computer Science King Khalid University Abha, Saudi Arabia;3. Lab-STICC, MOCS Team, Brest University, Brest, France;4. CES Laboratory, Sfax University, ENIS, Sfax, Tunisia;1. Department of Computer Science, University of Batna 2, Algeria;2. LIPADE Lab., Paris Descartes University, France;3. Department of Electrical and Computer Engineering, Iowa State University, USA;1. College of Computer Science and Electronic Engineering, Hunan University, China;2. Key Laboratory for Embedded and Network Computing of Hunan Province, China;3. Graduate School of Engineering, Nagoya University, Japan;4. Department of Computer Science, State University of New York, New Paltz, New York, USA;1. College of Computer Science and Electronic Engineering, Hunan University, China;2. Key Laboratory for Embedded and Network Computing of Hunan Province, China;3. Graduate School of Engineering, Nagoya University, Japan;4. Department of Computer Science, State University of New York, New Paltz, New York, USA |
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| Abstract: | Nowadays, cache memories are applicable to real-time systems with the help of tools that obtain the worst-case execution time (WCET) of cached programs. However, these tools do not allow preemption, because from the point of view of program analysis, the number of preemptions is unknown. To face this problem, the cache-related preemption cost can be considered in the schedulability analysis, or annulled by the use of private cache partitions. This paper comprises a number of techniques using the first or both solutions. This paper also explores the harmonic relationships among tasks to improve the estimation of the cache interference in the analysis. |
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