Dynamic joint model of capacitive charge pumps and on‐chip photovoltaic cells for CMOS micro‐energy harvesting

On‐chip energy harvesting by means of integrated photovoltaic cells in standard CMOS technology can be successfully used to recharge or power‐up integrated circuits with the use of charge pumps for voltage boosting. In this paper, a tool to facilitate the design of such structures is proposed consisting of an accurate model of the joint dynamics of the micro‐photovoltaic cell and a capacitive DC/DC converter in the slow‐switching limit regime. The model takes into account both the top and bottom parasitic capacitances of the flying capacitors. We assume a classical model for the photodiode whose photogenerated current is extracted from device‐level simulations. The joint model is verified by circuit‐level simulations achieving high accuracy and computation time savings of up to 1700×. The joint model shows that the voltage generated by an integrated photovoltaic cell connected to a capacitive DC/DC converter is not constant even under constant illumination. This phenomenon can only be reproduced through the joint model and failing to take it into account results in an error in the estimation of the time needed by the DC/DC converter to reach a given output voltage. We also demonstrate that the maximum output voltage reached by a DC/DC converter in the slow‐switching limit regime when a photovoltaic cell is used as energy transducer depends on the switching frequency. Finally, the applicability of the model is illustrated through the optimization of time response and charge efficiency for the Dickson, Fibonacci, and exponential topologies in the case of implantable devices. Copyright © 2016 John Wiley & Sons, Ltd.