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An adaptive digital processor for power efficiency enhancement in hybrid supply modulators
Authors:Atefeh Salimi  Rasoul Dehghani  Abdolreza Nabavi
Affiliation:1. Department of Electrical and Computer Engineering, Isfahan University of Technology, Isfahan, Iran;2. Faculty of Electrical and Computer Engineering, Tarbiat Modares University, Tehran, Iran
Abstract:A novel digital envelope modulator for envelope tracking radio frequency power amplifier is presented in this paper. The proposed modulator consists of a parallel combination of linear class AB and switching class D power amplifiers that are controlled digitally. In the previous analog architectures, the requirements needed for the AB operational amplifier such as high‐current driving capability, high bandwidth and large output swing is usually obtainable at high overall static power dissipation. The digitally controlled power opamp presented here not only provides the aforementioned requirements but also reduces power dissipation compared with previous work. Furthermore, the digital control of the modulator makes it adaptive to the input signal variations in comparison with conventional analog parallel hybrid envelope modulators. The digital processor of the modulator is evaluated with a 45‐nm complementary metal oxide semiconductor technology. The overall power consumption of the digital processor is around 142 mW at 1.5‐GHz clock frequency. As an application, the designed digital class AB is incorporated in a complete envelope modulator architecture. The overall efficiency of the modulator, including the digital processor power consumption, is around 82% at an average 32 dBm output power for a 5‐MHz input signal. Copyright © 2015 John Wiley & Sons, Ltd.
Keywords:digital processor  CMOS  envelope modulators  envelope tracking (ET)  power amplifier (PA)
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