基于FPGA的高速视频采集系统的设计

实时视频处理技术的飞速发展对视频采集系统的速度和质量提出了越来越高的要求。介绍了一种基于可编程逻辑器件FPGA控制器的图像采集系统，详细描述了其视频采集和解码模块、视频信号处理模块、存储与输出模块、LCD显示模块的设计。阐述了其工作原理，分析了其关键技术环节，并论述了其在FPGA硬件语言上的编程思路。实验结果表明,系统可对720×576像素的静态和动态的图像进行稳定地采集，并且能够以60帧/s的速度显示在LCD液晶屏上。

Design of high-speed video acquisition system based on FPGA

Growing requirements for speed and quality of video acquisition system are putted forward because of the rapid development of real-time video processing technology. This paper designs a image collection system based on FPGA controller with programmable logic ability and detailed subscribes modules including video acquisition and decoding, video signal processing, storage and output and LCD display. This paper also introduces working principle and analysis key technology. And related program methods are introduced. The experiment results show that both static and dynamic image with 720×576 pixels are stable acquired and displayed on LCD liquid crystal screen at a speed of 60 frames per second.