SMT炉后晶体管类元件无铅焊点的自动光学检测算法

基于3CCD彩色相机和3色(红、绿、蓝)LED阵列环形结构光源获取的无铅焊点图像,其图像的颜色分布反映焊点的三维特征.通过分析晶体管类元件的无铅焊点图像,提取出无铅焊点的区域特征、数字特征和逻辑特征;在这些特征的基础上,设计了一种检测炉后晶体管类元件无铅焊点的自动光学检测(AOI)算法.该算法提取的特征较全面地反映了无铅焊点的信息,适用于表面贴装技术(SMT)炉后晶体管类元件无铅焊点的检测.结果表明,此算法可有效地检测多锡、少锡、无锡、假焊、偏移、桥接、缺件等晶体管类元件常见的无铅焊点缺陷.

Abstract：

The color distribution of lead-free solder joint image, which is acquired by a 3-color (red, green, and blue) hemispherical LED arrays light resource and a 3-CCD color camera, can express the 3 dimensional shape of the solder joint. The region features, digital features and logical features are extracted from the solder joint image. Base on these features, an automatic optical inspection (AOI) algorithm for transistor lead-free solder joints is presented. The features obtained in the algorithm reflect the shape information of the lead-free solder joint properly, which can be applied to inspect the quality of the transistor lead-free solder joints in surface mounted technology (SMT). The experiment and analysis results show that the proposed method can effectively identify the lead-free solder joint defects of the transistor, such as surplus solder, lacking solder, no solder, riseudo solder, shift, bridging and component absent.

An AOI algorithm for transistor lead-free solder joints of SMT post-reflow

The color distribution of lead-free solder joint image, which is acquired by a 3-color (red, green, and blue) hemispherical LED arrays light resource and a 3-CCD color camera, can express the 3 dimensional shape of the solder joint. The region features, digital features and logical features are extracted from the solder joint image. Base on these features, an automatic optical inspection (AOI) algorithm for transistor lead-free solder joints is presented. The features obtained in the algorithm reflect the shape information of the lead-free solder joint properly, which can be applied to inspect the quality of the transistor lead-free solder joints in surface mounted technology (SMT). The experiment and analysis results show that the proposed method can effectively identify the lead-free solder joint defects of the transistor, such as surplus solder, lacking solder, no solder, riseudo solder, shift, bridging and component absent.