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一种带宽为3.8GHz,增益步长为0.1dB的可编程增益放大器
引用本文:林楠,方飞,洪志良,方昊. 一种带宽为3.8GHz,增益步长为0.1dB的可编程增益放大器[J]. 半导体学报, 2014, 35(3): 035004-6
作者姓名:林楠  方飞  洪志良  方昊
摘    要:A broadband programmable gain amplifier(PGA) with a small gain step and low gain error has been designed in 0.13 m CMOS technology. The PGA was implemented with open-loop architecture to provide wide bandwidth. A two-stage gain control method, which consists of a resistor ladder attenuator and an active fine gain control stage, provides the small gain step. A look-up table based gain control method is introduced in the fine gain control stage to lower the gain error.The proposedPGAshows a decibel-linear variable gainfrom4 to20 dB with a gain step of 0.1 dB and a gain error less than˙0.05 dB. The 3-dB bandwidth and maximum IIP3 are 3.8 GHz and 17 dBm, respectively.

关 键 词:可编程增益放大器  dBm  GHz  增益误差  CMOS技术  增益控制  控制阶段  PGA

A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step
Lin Nan,Fang Fei,Hong ZhiLiang and Fang Hao. A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step[J]. Chinese Journal of Semiconductors, 2014, 35(3): 035004-6
Authors:Lin Nan  Fang Fei  Hong ZhiLiang  Fang Hao
Affiliation:State Key Laboratory of ASIC and Systems, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC and Systems, Fudan University, Shanghai 201203, China;Telink Semiconductor Co, Ltd, Shanghai 201203, China;State Key Laboratory of ASIC and Systems, Fudan University, Shanghai 201203, China;LSI Corporation, 1320 Ridder Park Drive, San Jose, CA 95131, USA
Abstract:variable gain amplifier programmable gain amplifier decibel-linear gain CMOS integrated circuits hard disk drives
Keywords:variable gain amplifier  programmable gain amplifier  decibel-linear gain  CMOS integrated circuits  hard disk drives
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