high-performance and high-reliability 80-nm gate-length DTMOS with indium super steep retrograde channel |
| |
Authors: | Sun-Jay Chang Chun-Yen Chang Coming Chen Tien-Sheng Chao Yao-Jen Lee Tiao-Yuan Huang |
| |
Affiliation: | Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan; |
| |
Abstract: | In this paper, we demonstrate for the first time a high-performance and high-reliability 80-nm gate-length dynamic threshold voltage MOSFET (DTMOS) using indium super steep retrograde channel implantation. Due to the steep indium super steep retrograde (In SSR) dopant profile in the channel depletion region, the novel In-SSR DTMOS features a low V/sub th/ in the off-state suitable for low-voltage operation and a large body effect to fully exploit the DTMOS advantage simultaneously, which is not possible with conventional DTMOS. As a result, excellent 80-nm gate length transistor characteristics with drive current as high as 348 /spl mu/A//spl mu/m (off-state current 40 nA//spl mu/m), a record-high Gm=1022 mS/mm, and a subthreshold slope of 74 mV/dec, are achieved at 0.7 V operation. Moreover, the reduced body effects that have seriously undermined conventional DTMOS operation in narrow-width devices are alleviated in the In-SSR DTMOS, due to reduced indium dopant segregation. Finally, it was found for the first time that hot-carrier reliability is also improved in DTMOS-mode operation, especially for In-SSR DTMOS. |
| |
Keywords: | |
|
|