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Design and optimization for multiprocessor interactive GPU
Authors:DENG Jun-yong  LI Tao  JIANG Lin  HAN Jun-gang  SHEN Xu-bang
Affiliation:1. School of Micro-electronics, Xidian University, Xi''an 710071, China;2. School of Electronic Engineering, Xi''an University of Posts and Telecommunications, Xi''an 710121, China
Abstract:In order to achieve maximization of parallelism, effective distribution of rendering tasks, balance between performance and flexibility in graphics processing pipeline, this article presents design, performance analysis and optimization for multi-core interactive graphics processing unit (MIGPU). This processor integrates twelve processing cores with specific instruction set architecture and many sophisticated application-specific accelerators into a 3D graphics engine. It is implemented on XC6VLX550T field programmable gate array (FPGA). MIGPU supports OpenGL2.0 with programmable front-end processor, vertex shader, plane clipper, geometry transformer, three-D clippers and pixel shaders. For boosting the performance of MIGPU, the relationship model is established between primitive types, vertices, pixels, and the effect of culling, clipping, and memory access, and shows a way to improve the speed up of the graphics pipeline. It is capable of assigning graphics rendering tasks to different processors for efficiency and flexibility. The pixel filling rate can reach to 40 Mpixel/s at its peak performance.
Keywords:multiprocessor  graphics processing unit (GPU)  performance optimization  parallelism
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