A 9-ns 16-Mb CMOS SRAM with offset-compensated current senseamplifier |
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| Authors: | Seno K Knorpp K Shu L-L Teshima N Kihara H Sato H Miyaji F Takeda M Sasaki M Tomo Y Chuang PT Kobayashi K |
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| Affiliation: | Semicond. Group, Sony Corp., Kanagawa; |
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| Abstract: | A 9-ns 16-Mb CMOS SRAM has been developed using a 0.35-μm CMOS process, The current-mode fully nonequalized data path has been realized in a CMOS SRAM for the first time by using a stabilized feedback current-sense amplifier (SFCA) that provides a small input resistance and an offset compensation effect. To reduce the test time, a bit-line wired-OR parallel test circuit has been implemented |
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