A VLIW processor with reconfigurable instruction set for embedded applications |
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Authors: | Lodi A. Toma M. Campi F. Cappelli A. Canegallo R. Guerrieri R. |
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Affiliation: | Adv. Res. Center for Electron. Syst., Univ. of Bologna, Italy; |
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Abstract: | This paper describes a new architecture for embedded reconfigurable computing, based on a very-long instruction word (VLIW) processor enhanced with an additional run-time configurable datapath. The reconfigurable unit is tightly coupled with the processor, featuring an application-specific instruction-set extension. Mapping computation intensive algorithmic portions on the reconfigurable unit allows a more efficient elaboration, thus leading to an improvement in both timing performance and power consumption. A test chip has been implemented in a standard 0.18-/spl mu/m CMOS technology. The test of a signal processing algorithmic benchmark showed speedups ranging from 4.3/spl times/ to 13.5/spl times/ and energy consumption reduced up to 92%. |
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