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Highly suppressed short-channel effects in ultrathin SOI n-MOSFETs
Authors:Suzuki  E Ishii  K Kanemaru  S Maeda  T Tsutsumi  T Sekigawa  T Nagai  K Hiroshima  H
Affiliation:Electrotech. Lab., Ibaraki;
Abstract:We have investigated short-channel effects of ultrathin (4-18-nm thick) silicon-on-insulator (SOI) n-channel MOSFET's in the 40-135 nm gate length regime. It is experimentally and systematically found that the threshold voltage (Vth) roll-off and subthreshold slope (S-slope) are highly suppressed as the channel SOI thickness is reduced. The experimental 40-nm gate length, 4-nm thick ultrathin SOI n-MOSFET shows the S-slope of only 75 mV and the ΔVth of only 0.07 V as compared to the value in the case of the long gate-length (135 nm) device. Based on these experimental results, the remarkable advantage of an ultrathin SOI channel in suppressing the short-channel effects is confirmed for future MOS devices
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