p-channel GaAs SIS (semiconductor-insulator-semiconductor) FET |
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| Authors: | Matsumoto K Ogura M Wada T Yao T Hayashi Y Hashizume N Kato M Endo T Inage H |
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| Affiliation: | Electrotechnical Laboratory, Tsukuba, Japan; |
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| Abstract: | The first p-channel GaAs SIS (semiconductor-insulator-semiconductor) FET having a p+-GaAs/undoped GaAlAs/undoped GaAs structure is reported. The FET fabricated shows a transconductance of gm=30 mS/mm, a drain conductance of gd=2.5 mS/mm and a threshold voltage of Vth=+0.2 V at 77 K in the dark. |
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