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A CNFET-based hybrid multi-threshold 1-bit full adder design for energy efficient low power applications
Authors:Mojtaba Maleknejad  Somayyeh Mohammadi  Hamid Reza Naji  Mehdi Hosseinzadeh
Affiliation:1. Department of Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran;2. Department of Electrical Engineering, Payame Noor University (PNU), Kerman, Iran;3. Faculty of Electrical and Computer Engineering, Graduate University of Advanced Technology, Kerman, Iran;4. Iran University of Medical Sciences, Tehran, Iran;5. Computer Science, University of Human Development, Sulaimaniyah, Iraq
Abstract:In this article, a low-power and energy-efficient hybrid full adder circuit is proposed, which is implemented based on multi-threshold NAND and NOR gates and transmission gate multiplexers. In order to implement this circuit, carbon nano tube field effect transistors are utilised. For evaluating the proposed design, comprehensive simulations are performed with regard to the most important aspects power, delay and power-delay product. The results are presented and displayed the superiority of the proposed cell in different voltage levels, load conditions, temperatures and robustness against process variations.
Keywords:Carbon nano tube field effect transistor (CNFET)  full adder  hybrid design  multi-threshold  low power  nanoelectronics
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