Digital background calibration of pipeline ADC based on correlation

Two novel calibration techniques based on dither injection and correlation are proposed. The first calibration algorithm utilises digital windows around the residue folding points by adding more comparators. Then all the capacitor mismatches and the linear gain error of the residue amplifier (RA) are calibrated by injecting dither signal in the windows. This new scheme would not change the key analogue signal path and thus brings no dither leakage in the digital domain. The other calibration algorithm injects dither signal into the split sampling capacitors to estimate the nonlinear kick-back error, which always exists in sample-hold amplifier less (SHA-less) structure. In addition, three other dither signals are injected into the added capacitors to calibrate the linear and nonlinear errors of the RA, which relaxes gain requirement in multiplying digtital-analogue-converter . Both the algorithms and the corresponding analogue-digital-converters (ADCs) are constructed and simulated in MATLAB. According to the simulation results, the first calibration technique increases signal-noise-distortion-ratio (SNDR) and spurious-free-dynamic-range (SFDR) by 40 and 42 dB, respectively. The second calibration scheme improves SNDR and SFDR by 19 and 34 dB in a SHA-less ADC.