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基于RISC-V指令扩展的低开销SM4算法设计与实现
引用本文:陈,锐.基于RISC-V指令扩展的低开销SM4算法设计与实现[J].电子器件,2021,44(1):108-113.
作者姓名:  
作者单位:南京工业职业技术大学计算机与软件学院,江苏南京210012;东南大学微电子学院,江苏南京210035
基金项目:江苏省工业软件工程技术研究开发中心开放基金重点项目(ZK19-04-03)
摘    要:为了保障工业物联网采集数据的机密性,同时考虑到物联网终端设备资源受限与成本低廉的特点,提出以软硬件协同设计的方式实现SM4算法,以平衡资源开销、性能和延时。在开源RISC-V指令集的基础上,增加了两条自定义指令以实现密钥扩展和加解密算法的轮函数,设计了一款低开销的SM4指令功能单元硬件电路结构。从时钟周期精确的仿真结果来看,与无扩展指令的实现相比,延时缩减81.72%,吞吐率提升4.47倍。从SMIC 180 nm工艺下综合结果来看,SM4指令功能单元仅占用了1684门,与参考文献相比,资源开销至少降低38.9%。

关 键 词:工业物联网  SM4  RISC-V  指令扩展  加密

Design and Implementation of Low-Cost SM4 Algorithm Based on RISC-V Instruction Set Extension
CHEN Rui,LI Bing,LIU Xiangdong.Design and Implementation of Low-Cost SM4 Algorithm Based on RISC-V Instruction Set Extension[J].Journal of Electron Devices,2021,44(1):108-113.
Authors:CHEN Rui  LI Bing  LIU Xiangdong
Affiliation:(School of Computer and Software Engineer,Nanjing Vocational University of Industry Technology,Nanjing Jiangsu 210012,China;School of Microelectronics,Southeast University,Nanjing Jiangsu 210035,China)
Abstract:Considering constrained resource and low cost of Industrial Internet of Things(IIoT)devices,in order to protect the confidentiality of data collected by the IIoT devices,hardware/software co-design of SM4 algorithm is proposed to balance resource overhead,performance and delay. Based on open-source RISC-V instruction set architecture(ISA),two customized instructions are added to realize round functions of encryption/decryption and key expansion,and a low-cost hardware architecture of SM4 instruction function unit is designed and implemented. According to cycle-accurate simulation results,the latency is reduced by 81.72% and throughput is improved 4.47 times compared with implementation without custom instructions. The synthesis results under SMIC 180 nm technology demonstrate that,compared with related works,the hardware resource overhead is reduced by 38.9% at least.
Keywords:industrial IoT  SM4  RISC-V  instruction set extension  encryption
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