多端口寄存器堆的低功耗设计方法

随着半导体工艺的飞速发展和芯片工作频率的提高，芯片的功耗迅速增加，导致芯片发热量的增大和可靠性的下降。因此，功耗成为集成电路设计中的一个重要考虑因素。寄存器堆作为微处理器的关键部件，为了满足其运算速度和指令级并行的流水线结构，高速和多端口读写成为发展的必然趋势，其低功耗设计对降低整个处理器的功耗具有重要的意义。读写位线、负载电容、灵敏放大器、时钟翻转等是影响寄存器堆总功耗的重要因素。针对各因素进行低功耗设计成为寄存器堆设计的关键。

Ways for Low-Power Design of Multiple Ports Register Files

As the development of semi-conductor technics and the improvement of chip's working frequency,the power consumption of chip increases sharply that its heat capacity enlarges and reliability falls quickly.Therefore,power becomes a main consideration of IC design.As a vital component of CPU,in order to satisfy the operation speed and ILP pipeline structure,the multi-ports R/W and high-speed is certainly the trend of development.Its low-power design plays an important part in reducing CPU's power consumption.R...