| 栅极下加氧化层的新型沟槽栅E-JFET仿真研究 |
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| 引用本文： | 田波,亢宝位,吴郁,韩峰.栅极下加氧化层的新型沟槽栅E-JFET仿真研究[J].中国集成电路,2009,18(2):13-16. |
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| 作者姓名： | 田波 亢宝位 吴郁 韩峰 |
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| 作者单位： | 北京工业大学,北京,100022 |
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| 基金项目： | 北京市教委科技发展计划 |
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| 摘 要： | 新结构沟槽栅E-JFET的特点是在栅极下隐埋局域氧化层，以降低栅电容，从而改善器件的开关速度，尤其是适用于低压高频领域。通过理论及仿真分析，与无隐埋氧化层的沟槽栅MOSFET以及沟槽栅E-JFET进行了性能比较。结果证明，该结构具有最低的开关功耗，即Q0最小，在相同条件下相对于沟槽栅MOSFET和沟槽栅E-JFET来说，Q0的改善分别可达到86．3％和13．4％。
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| 关 键 词： | 半导体器件 沟槽栅E-JFET 通态电阻 低压高频领域 |
Novel Structure Trench E-JFET with Adding Oxide Region beneath Gate |
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| TIAN Bo,KANG Bao-wei,WU Yu,HAN Feng.Novel Structure Trench E-JFET with Adding Oxide Region beneath Gate[J].China Integrated Circuit,2009,18(2):13-16. |
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| Authors: | TIAN Bo KANG Bao-wei WU Yu HAN Feng |
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| Affiliation: | Beijing University of Technology;Beijing 100022;China |
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| Abstract: | A novel structure trench E-JFET with burying oxide region beneath gate is designed, which is applied in the field of lowvoltage and high frequency operation. This device has lowgate capacitance and high switching speed. It is verified through theoretical analysis and simulation that this structure has the lowest switching power consumption, i.e. the lowest QG, compared with trench MOSFET and trench E-JFET which have no buried oxide region, QG improvement is up to 86.3% and 13.4% respectively at the same tes... |
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| Keywords: | semiconductor device process parameters/metal-oxide-semiconductor transistor |
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