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功率VDMOS器件的ESD瞬态模型
引用本文:李泽宏,周春华,胡永贵,刘勇,张波,徐世六.功率VDMOS器件的ESD瞬态模型[J].半导体学报,2008,29(10):2014-2017.
作者姓名:李泽宏  周春华  胡永贵  刘勇  张波  徐世六
作者单位:电子科技大学电子薄膜与集成器件国家重点实验室,成都,610054;中国电子科技集团公司第二十四研究所,模拟集成电路国家重点实验室,重庆,400060;电子科技大学电子薄膜与集成器件国家重点实验室,成都,610054;中国电子科技集团公司第二十四研究所,模拟集成电路国家重点实验室,重庆,400060
摘    要:基于对功率VDMOS器件ESD保护及初始条件的分析,建立了VDMOS器件的ESD保护等效电路,分析了ESD响应过程,得到功率VDMOS器件的ESD瞬态模型. 分析结果表明,该模型准确地描述了功率VDMOS器件的ESD瞬态放电过程,解决了以往模型中初始条件分析不足等问题. 借助该模型,获得ESD器件的等效电阻和击穿电压、VDMOS的栅极输入电阻、栅源电容、栅氧厚度等与功率VDMOS器件抗ESD能力的关系,为功率VDMOS器件的抗ESD保护设计提供重要指导.

关 键 词:VDMOS  ESD  等效电路  初始条件  瞬态模型
修稿时间:4/24/2008 6:14:58 PM

ESD Transient Model of Vertical DMOS Power Devices
Li Zehong,Zhou Chunhu,Hu Yonggui,Liu Yong,Zhang Bo and Xu Shiliu.ESD Transient Model of Vertical DMOS Power Devices[J].Chinese Journal of Semiconductors,2008,29(10):2014-2017.
Authors:Li Zehong  Zhou Chunhu  Hu Yonggui  Liu Yong  Zhang Bo and Xu Shiliu
Affiliation:State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China;National Laboratory of Analog Integrated Circuits,Sichuan Institute of Solid-State Circuits,CETC,Chongqing 4;State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China;National Laboratory of Analog Integrated Circuits,Sichuan Institute of Solid-State Circuits,CETC,Chongqing 400060,China;National Laboratory of Analog Integrated Circuits,Sichuan Institute of Solid-State Circuits,CETC,Chongqing 400060,China;State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,China;National Laboratory of Analog Integrated Circuits,Sichuan Institute of Solid-State Circuits,CETC,Chongqing 400060,China
Abstract:Based on the equivalent circuit of VDMOS,the initial condition and transient response process are analyzed and the ESD transient model of the power VDMOS device is obtained.Results show that the ESD transient discharge process is correctly depicted with this model,which resolves the problem of the insufficient initial conditions of other models.Based on this model,the relationships between ESD threshold voltage and gate input protection series resistance,breakdown voltage,and parasitic dynamic resistance of the Zener diodes,and gate-source capacitance and gate oxide thickness of the power VDMOS,are obtained.This model can guide the design of ESD protection for power VDMOSs
Keywords:VDMOS  ESD  equivalent circuit  initial condition  transient model
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