Scaling the Aspect Ratio of Nanoscale Closely Packed Silicon Vias by MacEtch: Kinetics of Carrier Generation and Mass Transport |
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Authors: | Jeong Dong Kim Parsian K. Mohseni Karthik Balasundaram Srikanth Ranganathan Jayavel Pachamuthu James J. Coleman Xiuling Li |
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Affiliation: | 1. Department of Electrical and Computer Engineering, Micro and Nanotechnology Laboratory, Materials Research Laboratory, University of Illinois at Urbana–Champaign, IL, USA;2. Microsystems Engineering, Rochester Institute of Technology, Rochester, NY, USA;3. SanDisk, a Western Digital Brand, Milpitas, CA, USA;4. Department of Electrical Engineering and Department of Materials Science, University of Texas at Dallas, Richardson, TX, USA;5. International Institute for Carbon‐Neutral Energy Research (I2CNER), Kyushu University, Fukuoka, Japan |
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Abstract: | Metal‐assisted chemical etching (MacEtch) has shown tremendous success as an anisotropic wet etching method to produce ultrahigh aspect ratio semiconductor nanowire arrays, where a metal mesh pattern serves as the catalyst. However, producing vertical via arrays using MacEtch, which requires a pattern of discrete metal disks as the catalyst, has often been challenging because of the detouring of individual catalyst disks off the vertical path while descending, especially at submicron scales. Here, the realization of ordered, vertical, and high aspect ratio silicon via arrays by MacEtch is reported, with diameters scaled from 900 all the way down to sub‐100 nm. Systematic variation of the diameter and pitch of the metal catalyst pattern and the etching solution composition allows the extraction of a physical model that, for the first time, clearly reveals the roles of the two fundamental kinetic mechanisms in MacEtch, carrier generation and mass transport. Ordered submicron diameter silicon via arrays with record aspect ratio are produced, which can directly impact the through‐silicon‐via technology, high density storage, photonic crystal membrane, and other related applications. |
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Keywords: | etching high aspect ratio MaCE MacEtch through silicon via |
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