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RapidIO背板信号完整性测试方法
引用本文:曹 劲. RapidIO背板信号完整性测试方法[J]. 电讯技术, 2011, 51(1): 18-22. DOI: 10.3969/j.issn.1001-893x.2011.01.004
作者姓名:曹 劲
作者单位:中国西南电子技术研究所,成都,610036
摘    要:RapidIO背板的信号完整性优劣直接影响了RapidIO总线性能.结合行业规范,分解出Ra-pidIO背板信号完整性的相关指标要求,并推导出一套完整的背板测试方法,结合一个典型的背板系统.对测试方法进行了详细的分析说明.该套测试方法切实可行,可直接应用于类似的RapidIO背板测试.

关 键 词:RapidIO总线  背板  信号完整性  测试方法

Signal Integrity Test Method for RapidIO Backplane
CAO Jin. Signal Integrity Test Method for RapidIO Backplane[J]. Telecommunication Engineering, 2011, 51(1): 18-22. DOI: 10.3969/j.issn.1001-893x.2011.01.004
Authors:CAO Jin
Affiliation:CAO Jin(Southwest China Institute of Electronic Technology,Chengdu 610036,China)
Abstract:The signal integrity (SI) problem of RapidIO backplane has direct effect on the RapidIO bus performance. According to the industrial specification, this paper analyses the related SI performance requirement for the RapidIO backplane and introduces an integrated test method which is demonstrated particularly for a typical backplane system. The test method is feasible and can be applied to the similar RapidIO backplane test.
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