| 高速电路板级信号完整性设计 |
| |
| 引用本文： | 张松松,刘飞飞.高速电路板级信号完整性设计[J].电子科技,2013,26(10):105-109. |
| |
| 作者姓名： | 张松松 刘飞飞 |
| |
| 作者单位： | (西安电子科技大学 电路CAD研究所,陕西 西安 710071) |
| |
| 摘 要： | 随着系统工作频率及信号边沿转换速率提高,在实际PCB设计中要求设计者能熟练运用设计规则并针对不同设计要求相应调整。文中结合高速电路中常见SI设计技术与实际PCB设计实例,分析了常见SI设计规则工作原理,为应对日益复杂的高速PCB设计提供参考。
|
| 关 键 词： | 信号完整性 反射 串扰 延时匹配 高速电路设计 |
Signal Integrity Design of High-speed Printed Circuit Board |
| |
| ZHANG Songsong
,
LIU Feifei.Signal Integrity Design of High-speed Printed Circuit Board[J].Electronic Science and Technology,2013,26(10):105-109. |
| |
| Authors: | ZHANG Songsong LIU Feifei |
| |
| Affiliation: | (Institute of Electronic CAD,Xidian University,Xi'an 710071,China) |
| |
| Abstract: | The increasing system operating frequency and signal edge slew rate in the actual PCB design require designers' skillful use of design rules and adjustment to different design requirements.With high-speed circuit design techniques common in SI and the actual PCB design as examples,this article analyzes the working principles and common SI design rules to provide references for increasingly complex high-speed PCB design. |
| |
| Keywords: | signal integrity reflection crosstalk delay matching high-speed circuit design |
| 本文献已被 CNKI 万方数据 等数据库收录！ |
| 点击此处可从《电子科技》浏览原始摘要信息 |
|
点击此处可从《电子科技》下载全文 |
