基于FPGA的单片移相信号发生器的设计

介绍了以FPGA为核心器件,采用Verilog HDL作为硬件描述语言的移相信号发生器的设计。该移相信号发生器以DDS模型作为基本原理,利用FPGA的嵌入式存储器块作为波形数据的存储单元,最终通过D/A转换单元可输出正弦波、三角波、方波等任意波形的同频率原始参考信号和移相信号两路波形,除D/A转换器及相关电路外,所有功能电路模块均集中在一片FPGA中实现。与传统移相信号发生器相比,该设计的频率分辨度高、信号频谱良好、易于实现且成本低廉。

Design of Phase-shift Signal Generator Based on FPGA and DDS

This paper introduces the design of phase-shift signal generator based on FPGA and Verilog HDL.It takes advantage of the principle of DDS and the embedded memory block of FPGA to store the waveform data.The phase-shift signal generator uses two D/A converters to generate two channels of phrase-shift signal and original reference signal that are of the same frequency in the arbitrary waveforms,for instance,sine wave,triangular wave,and square wave.Except for DA converters and its related circuits,all the functional modules are accomplished in a single FPGA.This design has the advantages over traditional phase-shift signal generator of high frequency resolution,a pure frequency spectrum,ease implementation and low cost.