首页 | 本学科首页   官方微博 | 高级检索  
     

一种低功耗射频CMOS电荷泵锁相环的设计
引用本文:周海峰,韩雁,董树荣,韩晓霞,程维维.一种低功耗射频CMOS电荷泵锁相环的设计[J].微电子学,2009,39(1).
作者姓名:周海峰  韩雁  董树荣  韩晓霞  程维维
作者单位:浙江大学微电子与光电子研究所,杭州,310027
基金项目:国家高技术研究发展计划(863计划) 
摘    要:描述了基于P型CSL(Current Steer Logic)架构压控振荡器的低功耗射频锁相环设计.其鉴频鉴相器模块采用预充电模式,具有高速、无死区等特点;电荷泵模块在提高开关速度的基础上,改进了拓扑结构,使充放电电流的路径深度相同,更好地实现了匹配;为了达到宽调谐范围的目的,电荷泵模块采用1.8 V电源电压,而压控振荡器模块采用3.3 V,这样可充分利用电荷泵的输出电压范围实现宽调谐.电路设计基于0.18μm 1P6M CMOS工艺,芯片实测结果显示,锁相环工作在940 MHz~2.23 GHz的频率范围内,功耗低于15.2mW,芯片面积为750μm×400μm(不包括10).

关 键 词:锁相环  射频  压控振荡器  电荷泵

A Low-Power RF CMOS Charge Pump PLL
ZHOU Haifeng,HAN Yan,DONG Shurong,HAN Xiaoxia,CHENG Weiwei.A Low-Power RF CMOS Charge Pump PLL[J].Microelectronics,2009,39(1).
Authors:ZHOU Haifeng  HAN Yan  DONG Shurong  HAN Xiaoxia  CHENG Weiwei
Affiliation:1.Institute of Microelectronics and Photoelectronics;Zhejiang University;Hangzhou 310027;P.R.China
Abstract:A phase-locked loop(PLL) based on voltage controlled oscillator(VCO) with P-type CSL(Current Steer Logic) structure was presented.A pre-charge mode was used in phase/frequency detector to realize high speed and dead zone free,etc.The topology of the circuit was also enhanced to equalize the depths of charge and discharge currents,which improved the circuit matching.In order to expand the tuning range of the PLL,a 1.8 V power supply was used in the charge pump module,while a 3.3 V power supply was used for V...
Keywords:
本文献已被 CNKI 维普 万方数据 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号